1. Field of the Invention
The present invention relates to a multiplying apparatus, more particularly to a multiplying apparatus suitable for being used when it is built in a computer system, specially in a microcomputer.
2. Description of Related Art
As a general conventional example of a multiplying apparatus built in a computer system, specially in a microcomputer, two methods are well known, that is, a parallel operation method in which adding circuits of plural stages are used, and a serial operation method in which addition is performed by adding circuit of one stage due to repetition based on a microprogram.
FIG. 1 is a schematic diagram showing a configuration example of a hardware for a conventional parallel operation method. In addition, it is assumed here that both a multiplicand and a multiplier are four bits.
In FIG. 1, reference characters 51a through 51f respectively show half adders (HA), and reference characters 52a through 52f respectively show full adders (FA). And characters X1 through X4 show respective digits of the multiplicand of four bits in binary number expression, characters Y1 through Y4 show respective digits of the multiplier of four bits in binary number expression, and characters Z1 through Z8 show respective digits of the multiplication result.
In the parallel operation method which is performed by such a hardware having the configuration shown in FIG. 1, when respective digits of the multiplicand and respective digits of the multiplier are given, addition is performed in adding circuits in respective stages successively in such a procedure that, after addition is performed in the adding circuit in each stage, the addition result and a carry are propagated to the adders in the next stage, and finally the respective digits Z1 through Z8 of the multiplication result are obtained.
In such a parallel operation method, when respective digits of the multiplicand and respective digits of the multiplier are given, since the multiplication result is outputted immediately although there is a little circuit delay in each adder, it is possible to process in relatively high speed. But, basically, the adding circuit in each stage requires adders equal to that of the digits of a multiplicand, and adding circuit must have the stages whose number is equal to that of the digits of a multiplier, the fact resulting in increasing in hardware quantity.
FIG. 2 is a schematic diagram showing a hardware configuration and procedure of a conventional serial operation method. Here, it is assumed that both a multiplicand and a multiplier are four bits.
In FIG. 2, reference numeral 61 designates a multiplicand register in which respective digits X1, X2, X3, X4 of a multiplicand are held, numeral 62 designates an adding circuit, and numeral 63 designates an addition result register respectively. In addition, in FIG. 2, vertical direction shows a lapse of time.
In such a method shown in FIG. 2, at first in a first cycle C1, the first digit Y1 of the multiplier is added to all of the digits of the multiplicand held in the multiplicand register 61 to obtain the first digit Z1 of the multiplication result. In the next second cycle C2, the second digit Y2 of the multiplier is added to all of the digits of the multiplicand to obtain the second digit Z2 of the multiplication result. In the following, according to the same procedure, addition is repeated until the fourth cycle C4, and the results are shifted one by one and held in the addition result register 63, thereby the multiplication result is obtained finally.
In such a serial operation method, the hardware quantity becomes relatively small because the adding circuits require only one stage of adders whose number is equal to that of the bits of the multiplicand, however, high speed processing can not be expected because the additional operation based on the microprogram must be repeated equal number of times to the number of the bits of the multiplier.
Conventionally, a general multiplying apparatus built in a microcomputer has problems that, in the parallel operation method, high speed processing is possible but the hardware quantity is increased, and in the serial operation method, the hardware quantity is small but high speed processing can not be expected.